A SECURE INTELLIGENT NEURAL INTERFACE SOC WITH ADAPTIVE MIXED-SIGNAL ACQUISITION, ON-CHIP COMPRESSION, AND EDGE-AI-ASSISTED ENCRYPTED TELEMETRY IN 130 NM CMOS
Abstract
This paper presents the design and verification of a Secure Intelligent Neural Interface System-on-Chip (SoC) that unifies adaptive mixed-signal acquisition, AI-driven on-chip compression, and lightweight encrypted telemetry for next-generation implantable and wearable biomedical systems. The proposed architecture integrates low-noise programmable analog front-ends, tunable filters, and an event-driven compression engine managed by an on-chip edge-AI inference core. The intelligent digital subsystem dynamically adjusts encoding thresholds and analog bias parameters in real time to minimize power consumption while preserving neural signal fidelity. A lightweight AES-Light encryption module ensures privacy-preserving wireless telemetry through a 2.4 GHz FSK transmitter, achieving secure throughput exceeding 3 Mb/s. Designed and verified in 130 nm CMOS technology, the SoC demonstrates an overall simulated power consumption of ≈ 350 µW (≈ 5.1 µW/channel), 9:1 adaptive compression ratio, and < 1.5 % waveform error across variable spike activity levels. These results confirm that hardware–AI co-integration enables a new class of energy-efficient, adaptive, and secure neural interfaces, offering a scalable path toward intelligent brain–computer communication and long-term clinical monitoring applications.
Keywords : Neural Interface • Mixed-Signal SoC • Edge Artificial Intelligence • Adaptive Compression • AES-Light Encryption • Secure Wireless Telemetry • Biomedical Electronics • 130 nm CMOS • Low-Power Design • Brain–Computer Interface.
